pub enum Mode {
Mode0,
Mode1,
Mode2,
Mode3,
}
Expand description
SPI modes indicating the clock polarity and phase.
Select the appropriate SPI mode for your device. Each mode configures the clock polarity (CPOL) and clock phase (CPHA) as shown below:
- Mode0: CPOL 0, CPHA 0
- Mode1: CPOL 0, CPHA 1
- Mode2: CPOL 1, CPHA 0
- Mode3: CPOL 1, CPHA 1
The Spi0
bus supports all 4 modes. Spi1
and Spi2
only support
Mode0
and Mode2
.
More information on clock polarity and phase can be found on Wikipedia.
Variants§
Trait Implementations§
source§impl PartialEq<Mode> for Mode
impl PartialEq<Mode> for Mode
impl Copy for Mode
impl Eq for Mode
impl StructuralEq for Mode
impl StructuralPartialEq for Mode
Auto Trait Implementations§
impl RefUnwindSafe for Mode
impl Send for Mode
impl Sync for Mode
impl Unpin for Mode
impl UnwindSafe for Mode
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more